Semiconductor Engineering

Process Variation Analysis Of Device Performance Using Virtual Fabrication — Methodology Demonstrated On A CMOS 14-nm FinFET Vehicle

A new methodology to assess the impact of fabrication inherent process variability on 14-nm fin field effect transistor (FinFET) device performance. August 18th, 2021 - By: Coventor A new methodology ...
Semiconductor Engineering

Using A Virtual DOE To Predict Process Windows And Device Performance Of Advanced FinFET Technology

With continuing finFET device process scaling, micro loading control becomes increasingly important due to its significant impact on yield and device performance [1-2]. Micro-loading occurs when the ...
ExtremeTech

GlobalFoundries announces new 7nm FinFET process, full node shrink

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Fudzilla

TSMC moves to 16nm FinFET

Promises an aggressive ramp-up TSMC president and co-CEO Mark Liu has announced his outfit has begun volume shipment of chips based on its 16-nm FinFET manufacturing process. He added that… TSMC ...
EDN

IP Design Kits Employ 12-nm FinFET Process Technology

Analog Bits announced the availability of analog and mixed-signal IP design kits for GlobalFoundries’ 12-nm Leading-Performance (12LP) FinFET semiconductor manufacturing process. The IP portfolio ...
Electronics Weekly

GloFo brings on 12nm finfet process

“We plan to introduce new client and graphics products based on GF’s 12nm process technology in 2018 as a part of our focus on accelerating our product and technology momentum,” says AMD CTO Mark ...
Purdue University

Transistors repurposed as microchip ‘clock’ address supply chain weakness

Microchip fab plants in the United States can cram billions of data processing transistors onto a tiny silicon chip, but a critical device, in essence a “clock,” to time the operation of those ...
EDN

Mentor Graphics Supports a Common Signoff Environment for Samsung and GLOBALFOUNDRIES 14nm FinFET

Sign-off enabling for 14nm FinFET includes decks for design rule checking with double patterning , layout vs. schematic checking, pattern matching-based verification, litho friendly design, and design ...
Fudzilla

Globalfoundries improves EUV yield

Globalfoundries has improved its extreme ultraviolet (EUV) mask yield rate to nearly 65 percent and made progress in its movement to EUV lithography. Company CTO Gary Patton told the assembled throngs ...
Science Daily

Transistors repurposed as microchip 'clock' address supply chain weakness

A new technique uses standard chip fab methods to fabricate the building block of a timing device, critical to all microprocessors. Currently, this timing device, known as an acoustic resonator, must ...