Shanghai, China -- March 04, 2009-- S2C Inc., a leading total solution provider in facilitating systems to chip innovations, today announced the representation of Northwest Logic Inc., a leading ...
As DDR3 moves closer to widespread deployment, the JEDEC standard is creating a problem for SoC designers—yet another extremely challenging high-speed serial interface to implement. Not only is DDR3 a ...
MemConnect™ is a Comprehensive, Customizable, and Silicon Proven IP Solution for memory system design. It is a complete memory system supporting any combinations of SDR SDRAM, DDR, DDR2, Mobile ...
ASIC designers can obtain programmable logic's reconfigurability. Adaptive Silicon's RAM-based reprogrammable logic IP for ASICs, the MSA2500, has up to 25,000 ASIC gates for flexible designs. Typical ...
Digital controller IP complements existing portfolio of high-speed interface PHYs Expands solutions for automotive, data center, artificial intelligence (AI), machine learning (ML) and communications ...
SUNNYVALE, Calif. & HILLSBORO, Ore.--(BUSINESS WIRE)--Rambus Inc. (NASDAQ: RMBS), a premier silicon IP and chip provider making data faster and safer, today announced it has signed a definitive ...
SUNNYVALE, Calif.--(BUSINESS WIRE)--Rambus Inc. (NASDAQ: RMBS), a premier silicon IP and chip provider making data faster and safer, today announced the completion of the previously-disclosed ...
FREMONT, Calif. and SHANGHAI, May 24 /PRNewswire-Asia/ — Virage LogicCorporation (Nasdaq: VIRL), the semiconductor industry's trusted IP partner,and Semiconductor Manufacturing International ...
It’s true that some designers prefer to buy controllers and PHYs separately, but many are asking IP vendors to provide pre-verified interface IP subsystems to reduce effort and time to market.
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