There is a rapidly growing interest in the use of structural techniques for testing random logic. In particular, much has been published on new techniques for on-chip compression of automatic test ...

Traditional IC pattern-generation methods focus on detectingdefects at gate terminals or at interconnects. Unfortunately, a significantpopulation of defects may occur within an IC's gates, or cells.

There is a rapidly growing interest in the use of structural techniques for testing random logic. In particular, much has been published on new techniques for on-chip compression of automatic test ...