For a useful primer on circuit design, see Optimize your DSPs for power and performance. To learn how power and performance vary with voltage and temperature, see Push performance and power beyond the ...

Lack of coordination between asynchronous resets and synchronous logic clocks leads to intermittent failures on power up. In this series of articles, we discuss the requirements and challenges of ...

As system-on-chip (SoC) designs grow larger, designers must grapple with serious global timing problems, the effect of wire loading and timing delays and the performance hit associated with supporting ...

Lack of coordination between asynchronous resets and synchronous logic clocks leads to intermittent failures on power up. In this series of articles, we discuss the requirements and challenges of ...

Many of today’s switching power supplies implement synchronous rectifiers to improve efficiency. In isolated topologies, the power-supply controller typically is located on the primary side of the ...

CMOS is, and will continue to be, the work-horse process technology of the semi-conductor industry. But designers of large devices, of complex SoCs and of devices using multiple IP elements are ...

As the quest grows to manage power in everything from the handheld smart phone to sensors for automotive applications and contactless payment cards, designers are getting hungry for new design ...

There are a number of interesting technologies to keep an eye on in term of how and when they could be adopted for use in SoC design today, some of which include gallium arsenide, GPGPUs, 3D ICs and ...

Computers and water typically don't mix, but in Manu Prakash's lab, the two are one and the same. Prakash, an assistant professor of bioengineering at Stanford, and his students have built a ...

(Nanowerk News) Computers and water typically don't mix, but in Manu Prakash's lab, the two are one and the same. Prakash, an assistant professor of bioengineering at Stanford, and his students have ...